In conventional techniques, Integrated Circuit (IC) chips are connected to external circuits by a wire bonding process. To meet the demand of small feature size of IC chips and the enlargement of a scale of ICs, the wire bonding process is less used. Wafer Level Chip Size Packaging (WLCSP) is a technology in which a whole wafer is packaged and tested, and then diced into individual chips. The size of a packaged chip is almost the same as that of a bare chip. WLCSP technology is totally different from conventional packaging technologies such as Ceramic Leadless Chip Carrier and Organic Leadless Chip Carrier, and satisfies the market requirements for micro-electronic products, e.g., light in weight, small in size, thin in thickness and low in cost. Packaging with the WLCSP technology realizes high miniaturization, and the chip cost decreases significantly with the decrease of the chip size and the increase of the wafer size. The WLCSP technology, which, when being implemented, may take into account the IC design, wafer fabrication and packaging test in combination, is currently a focus in the packaging field and becomes one of the development trends of the packaging technologies.
A WLCSP technology is provided in existing techniques. FIG. 1 schematically illustrates a cross-sectional view of an existing WLCSP structure. The WLCSP structure includes: a semiconductor substrate 101; a metal pad 103 inside the semiconductor substrate 101; an insulating layer 102 on a surface of the semiconductor substrate 101; the insulating layer 102 having an opening exposing the metal pad 103; a sub-ball metal electrode 104 formed in the opening and covering a portion of the metal pad 103; a solder ball 105 on the sub-ball metal electrode 104, which covers an upper surface of the sub-ball metal electrode 104.
In the above-described WLCSP structure, a contact area between the solder ball 105 and the sub-ball metal electrode 104 is relatively small, thus, the adhesion between the solder ball 105 and the sub-ball metal electrode 104 is relatively weak. Besides, the solder ball 105 which is generally made of tin directly contacts with the sub-ball metal electrode 104 which is generally made of copper. The tin atoms and copper atoms may diffuse into each other, forming intermetallic compounds and cavities. The intermetallic compounds are fragile, which may affect the mechanical strength and service life of welded points.
Thus, existing chip packaging methods have poor reliability.
More information about chip packaging methods can be found in Chinese patent publication No. CN101211791 which discloses a WLCSP process and a chip package structure.